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The RS, D, and JK flip-flops

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    Flip-flops are widely used electronic components and are essential in most circuits. Therefore, it is crucial to have an in-depth understanding of their behavior. To simplify the course, I will use the IEC symbols for flip-flops (European standards) and not Anglo-Saxon symbols, for example.

    When an input is inverted (usually denoted with a ‘-‘ above the variable), I will symbolize it as flip-flop 1.
    A flip-flop is asynchronous when it does not depend on the clock signal (Clock or CLK). As a result, a synchronous reset will only take effect on the active edge of the next clock cycle.

    The RS Flip-Flop

    The RS flip-flop is a very common logic circuit used in digital electronics to store a binary information bit. It consists of two NOR gates or two NAND gates that are connected in a way to create a positive feedback circuit. The RS flip-flop can be used as a simple storage element to memorize the state of a signal or as a synchronization element to synchronize different signals in an electronic system. However, the RS flip-flop can be prone to stability issues when used in high-speed applications, and it can also suffer from critical race problems if poorly designed.

    A very basic flip-flop. It has two inputs and two outputs.

    It is possible to add a clock to synchronize it.

    Its symbol

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    We notice that the clock is active on the falling edge (indicated by the CLK or the small triangle on the pin, just like in a mathematical formula). By the way, I will define the clock: It is a regular symmetrical signal (equal time in the low state as in the high state. It is ‘square’). Synchronous flip-flops operate on its edges.

    Its equivalent in combinational logic

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    The inversion is symbolized here by a small circle (the circle comes from Anglo-Saxon standards and the symbol of the gate from IEC standards… enough to confuse you. In principle, in IEC, inversion is symbolized by triangles).

    Truth table

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    The last line is a critical situation… at the same time, we’re asking the flip-flop to set itself to 1 and to set itself to 0… so we can’t know where we’ll end up (probably in the forbidden zone). Therefore, this state is FORBIDDEN!

    Timing Diagram

    A timing diagram is a time diagram. It allows you to see the evolution of the states of a flip-flop based on clock pulses.
    In the following timing diagram, CLK occurs on the rising edge.

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    The D Flip-Flop

    The D flip-flop is another type of logic circuit widely used in digital electronics to store a binary information bit. It is also made up of two logic gates, typically NAND gates or NOR gates, connected in a way to create a feedback circuit. However, unlike the RS flip-flop, the D flip-flop has a single input that controls the state of the circuit. When this input is activated, the D flip-flop stores the state of the input and holds it in memory until it is activated again. The D flip-flop is used in many applications, including storing addresses in memory circuits and synchronizing signals in signal processing circuits.

    Symbol

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    The advantage compared to the RS flip-flop is that we cannot have a “forbidden” state.

    Equivalent in combinational logic

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    Truth table

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    The JK Flip-Flop

    The JK flip-flop is a type of logic circuit that can be used as an extension of the RS flip-flop. It consists of two logic gates, typically NAND gates or NOR gates, as well as two inputs: J (set) and K (reset). When both J and K are set to 0, the output of the JK flip-flop remains unchanged. If J is activated, the output becomes 1, and if K is activated, the output becomes 0. However, if both J and K are activated at the same time, the output toggles between 0 and 1 with each clock pulse. The JK flip-flop is widely used in binary counting systems, shift register circuits, and synchronization circuits. It is also used for timing and pulse generation functions.

    We are now getting into something more challenging: the JK flip-flop

    Symbol

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    Combinational Logic

    I will provide it later; it is very similar to that of the previous flip-flops.
    Coming soon, complete examples on:

    – Divider by two, by four, …
    – Shift Register.

    Truth table

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    Here is an example
    In a divider by two, for example, using a D flip-flop

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    The chronogram

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    With a D flip-flop at hand, it becomes very simple to divide a frequency by 2, 4, …
    How does it work? With each clock pulse, the output Q takes on the value of D, which is… the inverse of Q!

    Source: daskoo.org | CC
    Image 74LS74 : wikimedia.org | (CC BY-SA 3.0)

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